Download Analog-Baseband Architectures And Circuits For Multistandard by Pui-In Mak, Ben U Seng Pan, Rui Paulo Martins PDF

By Pui-In Mak, Ben U Seng Pan, Rui Paulo Martins

With the previous few decade efforts on lithography and integrated-circuit (IC) applied sciences, very inexpensive microsystems were effectively built for lots of diverse functions. the craze in instant communications is towards making a networkubiquitous period within the years yet to come. Many remarkable possibilities and demanding situations, similar to layout for multi-standardability and low-voltage (LV) compliance, are quickly changing into the mainstream instructions in wireless-IC examine and improvement, on condition that the previous can supply the easiest connectivity between assorted networks, whereas the latter can facilitate the know-how migration into the sub-1-V nanoscale regimes for additional price and tool relief.

Analog-Baseband Architecturees and Circuits presents architectural and circuit strategies for instant transceivers to accomplish multistandard and low-voltage compliance. the 1st a part of the ebook studies the actual layer requisites of contemporary instant communique criteria, offers the basic tradeoffs inquisitive about transceiver structure choice, and offers case stories of the cutting-edge multistandard transceivers, the place the main recommendations strengthened are highlighted and mentioned. A statistical precis (with a hundred+ references brought up) of so much used transmitter and receiver architectures for contemporary verbal exchange criteria is equipped. all of the references are citied from the major boards, i.e., ISSCC, CICC, VLSI and ESSCIRC, from 1997 to 2005.

The moment half makes a speciality of the architectural layout of multistandard transceivers. A coarse-RF fine-IF (two-step) channelselection process is disclosed. It, during the reconfiguration of receiver and transmitter analog basebands, permits not just a leisure of the RF frequency synthesizer’s and native oscillator’s layout necessities, but additionally an effective multistandard compliance via synthesizing the low-IF and zero-IF within the receiver; and the direct-up and two-step-up within the transmitter. the primary is established in few layout examples. certainly one of them is a system-in-a-package (SiP) receiver analog baseband for IEEE 802.11a/b/g WLAN. It not just has the two-step channel choice embedded, but in addition encompasses a flexible-IF topology, a different 3D-stack floorplan, and a selected layout method for top testability and routability.

The 3rd half offers with the circuit layout. as well as the methodical description of many LV circuit strategies, three tailormade LV-robust practical blocks are awarded. They contain: 1) a double-quadrature-downconversion clear out (DQDF) – it realizes at the same time clock-rate-defined IF reception, I/Q demodulation, IF channel choice and baseband filtering. 2) A switched-current-resistor (SCR) programmable-gain amplifier (PGA) – it bargains a transient-free constant-bandwidth achieve adjustment. three) An inside-OpAmp dc-offset canceler – it saves the silicon zone required for figuring out a wide time consistent on chip whereas maximizing its highpass-pole switchability for speedy dc-offset transient.

The final half provides experimental result of the three tailored construction blocks and a fully-integrated analog-baseband IC fabricated in a standard-VTH CMOS approach. formerly untold on-/off-chip co-setup for either full-chip and development blocks measurements are defined. not just the development blocks have effectively prolonged the state of the art boundary by way of sign bandwidth and provide voltage, the analog-baseband IC has been to date the lowest-voltage-reported answer for IEEE 802.11a/b/g WLAN receivers.

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